NASA Space Chip Survives Extreme Radiation Thermal Shock Tests
A Simulation of Conditions No Chip Has Endured
Engineers at NASA’s Jet Propulsion Laboratory in Southern California are running a processor through a test campaign that no spaceflight computer has ever faced in exactly this combination. [2] The chip is being subjected to radiation, thermal, and shock tests simultaneously, while a separate functional test campaign measures whether it still performs after each assault. Testing began in February 2026 and is expected to continue for several months. [2]
The conditions being simulated are not abstract. High-energy particles from the Sun and from deep space can strike a processor and trigger computer errors that force a spacecraft into “safe mode” — a state where nonessential systems shut down until engineers on the ground diagnose and resolve the problem. Dramatic temperature swings can damage electronics. Intense electromagnetic radiation can corrupt memory and logic. The new processor must survive all of it.
What makes this test campaign different from previous qualification efforts is the scale of what is being asked of the chip. The processor is functioning as intended and has shown performance levels up to 100 times greater than the radiation-hardened chips currently used in spacecraft. [1] Early results have been highly encouraging.
The team marked the start of testing with a symbolic act: sending an email titled “Hello Universe.” The phrase references the famous introductory messages used during the early days of computer programming, when a new machine’s first task was often to print a simple greeting — proof that it was alive and responding.
The Mechanism That Lets a Chip Think for Itself
At the center of the project is a radiation-hardened processor built to deliver up to 100 times the computing power of today’s spaceflight computers. [1] The device is known as a system-on-a-chip, or SoC — a single compact unit that combines the essential components of a computer: central processing units, computational offloads, advanced networking systems, memory, and input/output interfaces.
SoCs are already common in smartphones and tablets because they are compact and energy efficient. NASA’s version is designed to survive for years in deep space, potentially traveling millions or even billions of miles from Earth without maintenance or repairs. That endurance requirement is what separates it from any consumer-grade chip.
“Building on the legacy of previous space processors, this new multicore system is fault-tolerant, flexible, and extremely high-performing,” said Eugene Schwanbeck, program element manager in NASA’s Game Changing Development program at the agency’s Langley Research Center in Hampton, Virginia. [3] “NASA’s commitment to advancing spaceflight computing is a triumph of technical achievement and collaboration.”
The fault tolerance Schwanbeck describes is not a minor feature. Current missions rely on older processors precisely because those chips are durable enough to survive the extreme conditions of space. They are dependable. But they lack the performance needed for more advanced missions. The new chip is designed to close that gap without sacrificing the durability that made the old ones last.
“We are putting these new chips through the wringer by carrying out radiation, thermal, and shock tests while also evaluating their performance through a rigorous functional test campaign,” said Jim Butler, High Performance Space Computing project manager at JPL. [2]
Butler also described how the team is testing the chip against the demands of planetary landings. “To simulate real-world performance, we are using high-fidelity landing scenarios from real NASA missions that would typically require power-intensive hardware to process huge volumes of landing-sensor data,” he said. “This is an exciting time for us to be working on hardware that will enable NASA’s next giant leaps.”
A Second Path Through Commercial Industry
The processor is being developed jointly by JPL and Microchip Technology Inc., based in Chandler, Arizona. [4] NASA’s JPL selected Microchip as a partner in 2022, and the company funded its own research and development work on the processor. [4] Sample chips have already been shared with defense and commercial aerospace partners.
That commercial partnership matters because it creates a second path for the technology. Microchip plans to adapt the processor for industries such as aviation and automotive manufacturing. The same architecture designed to survive deep space could eventually find its way into aircraft and vehicles on Earth.
The processor may eventually support crewed missions to the Moon and Mars. With onboard artificial intelligence, spacecraft could respond to unexpected situations in real time when communication delays make human control impractical. The chip could also help deep space missions process, store, and transmit massive amounts of scientific data back to Earth more efficiently.
Once the processor is certified for use in space, NASA plans to integrate it into a wide variety of missions: Earth orbiters, planetary rovers, deep space probes, and crewed habitats. The project is managed by the Space Technology Mission Directorate’s Game Changing Development program at NASA Langley, which oversaw the development process from mission planning and industry studies through final delivery. [5]
Sources
1. NASA
5. Caltech